Huawei has proposed a new principle called the “Tau (τ) Law” to guide semiconductor advancement as traditional chip miniaturization faces growing physical and economic hurdles.
He Tingbo, President of Huawei's Semiconductor Business, unveiled the concept at the International Circuit Systems Symposium (ISCAS) 2026, hosted by the IEEE.
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What is Tau Law?
Instead of relying solely on making transistors smaller—a method known as “geometric shrinkage”—Tau Law emphasizes “time shrinkage.”
This approach aims to reduce the time signals take to travel within a chip. Shorter delays lead to faster and more efficient processors.
A key technique is “logic folding,” which Huawei compares to folding a long road into compact layers so cars reach destinations quicker without increasing travel distance.
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In semiconductors, logic folding compresses chip logic to cut signal delay while boosting transistor density.
Huawei says this method works across devices, circuits, chips, and entire computing systems.
According to He Tingbo, Huawei has already designed and mass-produced 381 chips over the past six years using concepts related to this new approach.
First Commercial Product
The first major commercial chip using logic folding will be Huawei's next Kirin 2026 mobile processor, expected to launch this autumn.
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Huawei claims the technology will significantly improve performance and energy efficiency.
The company also believes chips developed under Tau Law could achieve a transistor density equivalent to advanced 1.4nm process technology within five years.
This does not mean Huawei will physically manufacture a true 1.4nm chip using traditional methods. Instead, smarter architecture and signal optimization could deliver similar computing capability.
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He Tingbo emphasized that no single company can solve the semiconductor industry's challenges alone, calling for cooperation.
